AMDGPU extension
Loaded with using AMDGPU. It accepts the sparse matrices of rocSPARSE, routes the dense operations of large fronts to rocBLAS and rocSOLVER, and lets the regime-A subtree kernels use the 64 KiB of local memory (LDS) per workgroup of AMD GPUs.
AMDGPU.rocSPARSE.ROCSparseMatrixCSR — Method
ROCSparseMatrixCSR(A::CSR)The stored CSR matrix of A (the transposed flag is not applied) as a ROCSparseMatrixCSR. One-based arrays are shared; zero-based index arrays are copied and rebased. Batches (nbatch(A) > 1) are rejected.
SparseDirectSolver.CSR — Method
CSR(A::ROCSparseMatrixCSC)Wrap A (m × n) without copying as the CSR of transpose(A) (n × m, transposed = true), sharing colPtr, rowVal and nzVal.
SparseDirectSolver.CSR — Method
CSR(A::ROCSparseMatrixCSR)Wrap A without copying: the CSR shares rowPtr, colVal and nzVal (one-based, transposed = false).
SparseDirectSolver.DirectSolver — Method
DirectSolver(A::ROCSparseMatrixCSR, structure::String, view::Char; index = 'O')
DirectSolver(A::ROCSparseMatrixCSC, structure::String, view::Char; index = 'O')Solver on A's arrays, without copies (the ROCm twin of DirectSolver(::CuSparseMatrixCSR, …)). A ROCSparseMatrixCSC is read as the CSR of its transpose with the view flipped, see DirectSolver.
LinearAlgebra.cholesky — Function
cholesky(A::ROCSparseMatrixCSR, NoPivot(); view = 'F', check = false) -> DirectSolver
cholesky(Symmetric(A::ROCSparseMatrixCSR)) / cholesky(Hermitian(A::ROCSparseMatrixCSR))LLᵀ/LLᴴ factorization of A on the AMD GPU; the wrappers pass their uplo as the view. See cholesky(::CSR).
LinearAlgebra.ldlt — Method
ldlt(A::ROCSparseMatrixCSR; view = 'F', check = false) -> DirectSolver
ldlt(Symmetric(A::ROCSparseMatrixCSR)) / ldlt(Hermitian(A::ROCSparseMatrixCSR))LDLᵀ/LDLᴴ factorization of A on the AMD GPU; the wrappers pass their uplo as the view. See ldlt(::CSR).
LinearAlgebra.lu — Method
lu(A::ROCSparseMatrixCSR; check = false) -> DirectSolverL D U factorization (structure "G") of A on the AMD GPU. See lu(::CSR).
SparseDirectSolver.max_local_bytes — Method
max_local_bytes(::ROCBackend) -> IntThe local data share (LDS) of one workgroup on the current HIP device (hipDeviceAttributeMaxSharedMemoryPerBlock, 64 KiB on CDNA): the regime-A kernels may use the 64 KiB class there (issue #60).
SparseDirectSolver.to_backend — Method
to_backend(A::SparseMatrixCSC, ::ROCBackend; index = 'O') -> CSRCSR arrays of A built on the host, then uploaded as ROCVectors.
SparseDirectSolver.update! — Method
update!(solver::DirectSolver, A::ROCSparseMatrixCSR)
update!(solver::DirectSolver, A::ROCSparseMatrixCSC)Point solver at the arrays of A, see update!.